An issue was discovered in SonicBOOM riscv-boom 3.0.0. For LR, it does not avoid acquiring a reservation in the case where a load translates successfully but still generates an exception.
BOOM: The Berkeley Out-of-Order RISC-V Processor commit d77c2c3 was discovered to allow unauthorized disclosure of information to an attacker with local user access via a side-channel analysis.
riscv-boom SonicBOOM L1 Data Cache timing discrepancy
Published 2025-08-09 · Analyzed
4.7EPSS 0.002
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